Executive Summary
| Informations | |||
|---|---|---|---|
| Name | CVE-2022-27813 | First vendor Publication | 2023-10-19 |
| Vendor | Cve | Last vendor Modification | 2023-11-07 |
Security-Database Scoring CVSS v3
| Cvss vector : CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:H | |||
|---|---|---|---|
| Overall CVSS Score | 8.2 | ||
| Base Score | 8.2 | Environmental Score | 8.2 |
| impact SubScore | 6 | Temporal Score | 8.2 |
| Exploitabality Sub Score | 1.5 | ||
| Attack Vector | Local | Attack Complexity | Low |
| Privileges Required | High | User Interaction | None |
| Scope | Changed | Confidentiality Impact | High |
| Integrity Impact | High | Availability Impact | High |
| Calculate full CVSS 3.0 Vectors scores | |||
Security-Database Scoring CVSS v2
| Cvss vector : | |||
|---|---|---|---|
| Cvss Base Score | N/A | Attack Range | N/A |
| Cvss Impact Score | N/A | Attack Complexity | N/A |
| Cvss Expoit Score | N/A | Authentication | N/A |
| Calculate full CVSS 2.0 Vectors scores | |||
Detail
| Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions. |
Original Source
| Url : http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-27813 |
CPE : Common Platform Enumeration
| Type | Description | Count |
|---|---|---|
| Os | 1 | |
| Os | 1 |
Sources (Detail)
| Source | Url |
|---|---|
| MISC | https://tetraburst.com/ |
Alert History
| Date | Informations |
|---|---|
| 2023-11-07 21:27:34 |
|
| 2023-10-28 00:27:39 |
|
| 2023-10-19 17:27:23 |
|
