Executive Summary

Informations
Name CVE-2024-45817 First vendor Publication 2024-09-25
Vendor Cve Last vendor Modification 2024-11-21

Security-Database Scoring CVSS v3

Cvss vector : N/A
Overall CVSS Score NA
Base Score NA Environmental Score NA
impact SubScore NA Temporal Score NA
Exploitabality Sub Score NA
 
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Security-Database Scoring CVSS v2

Cvss vector :
Cvss Base Score N/A Attack Range N/A
Cvss Impact Score N/A Attack Complexity N/A
Cvss Expoit Score N/A Authentication N/A
Calculate full CVSS 2.0 Vectors scores

Detail

In x86's APIC (Advanced Programmable Interrupt Controller) architecture, error conditions are reported in a status register. Furthermore, the OS can opt to receive an interrupt when a new error occurs.

It is possible to configure the error interrupt with an illegal vector, which generates an error when an error interrupt is raised.

This case causes Xen to recurse through vlapic_error(). The recursion itself is bounded; errors accumulate in the the status register and only generate an interrupt when a new status bit becomes set.

However, the lock protecting this state in Xen will try to be taken recursively, and deadlock.

Original Source

Url : http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-45817

Sources (Detail)

http://www.openwall.com/lists/oss-security/2024/09/24/1
http://xenbits.xen.org/xsa/advisory-462.html
https://xenbits.xenproject.org/xsa/advisory-462.html
Source Url

Alert History

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0
1
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Date Informations
2024-11-25 09:23:10
  • Multiple Updates
2024-09-26 17:27:35
  • Multiple Updates
2024-09-25 17:27:25
  • First insertion